DUEL MASTERS ENTRY GATE OF DRAGON SAGA IOS

Magwel introduces ESDi-XL with major new features
ESDi-XL adds core device checking, plus sophisticated topological checks for ESD issues. Now circuit designers can quickly check their designs for ESD issues before committing to layout. Comprehensive core checking will find core devices that might become over-stressed, even when a protecting ESD device triggers. New topological checks quickly identify issues in circuits that can cause ESD related failures. ESDi-XL supports layout-based checks for more accurate analysis at later stages of the design process.

Is decoupled electrical and thermal analysis leading to thermal runaway issues?
Learn how combined concurrent electro-thermal analysis on PowerMOS devices can save designs from overheating failures.

Want to work faster while making and verifying ESD violation fixes?
This SemiWiki article explains how fixes for ESD issues can be tested without looping back and forth between your layout editor and ESD simulator

Need to understand detailed dynamic switching behavior inside of PowerFETs?
See this animation of PTM-TR results for a power converter MosFET pair using Magwel generated Fast3D models co-simulated with Spectre®

Snapback behavior determines ESD protection effectiveness
Read about how proper modeling of snapback devices and parallel discharge paths can lead to success or failure in properly predicting ESD protection network effectiveness.

gate io app
Learn how Magwel RNi™ can help reduce costly VCC connection errors that contribute to a higher than necessary VCC-min.

Want to know the best location for replica and sense devices in power transistors?
Read how PTM-ET™ can help locate hot spots in power devices and provide assurance that replicas and sense devices are properly placed.